The majority of present day integrated circuits (ICs) are implemented by using a plurality of interconnected field effect transistors (FETs), also called metal oxide semiconductor field effect transistors (MOSFETs), or simply MOS transistors. An MOS transistor includes a gate electrode as a control electrode and spaced apart source and drain regions between which a current can flow. A control voltage applied to the gate electrode controls the flow of current through a channel between the source and drain electrodes. Complementary MOS (CMOS) devices include a plurality of N-channel MOS (NMOS) transistors and a plurality of P-channel (PMOS) transistors.
The source and drain regions are spaced apart impurity doped regions formed in a silicon substrate on opposite sides of the gate electrode. Metal silicides are often used to electrically contact the source and drain regions and to lower their electrical resistance. The metal silicide is formed by depositing a thin layer of silicide forming metal onto the silicon region and then heating the metal to react with the underlying silicon. Most common metal silicides have a very high coefficient of thermal expansion in comparison to silicon. After the silicidation the device is cooled, and, because of the high coefficient of thermal expansion, the metal silicide contracts faster than the silicon in which the silicide is formed. The differential contraction upon cooling generates a longitudinal tensile stress outside the silicide area of the source and drain regions including in the channel of the MOS transistor.
MOS transistors, in contrast to bipolar transistor, are majority carrier devices. The gain of an MOS transistor, usually defined by the transconductance (gm), is proportional to the mobility of the majority carriers in the transistor channel. The current carrying capability of an MOS transistor is proportional to the mobility of the majority carrier in the channel. The mobility of electrons, the majority carrier in an NMOS transistor, can be increased by applying a longitudinal tensile stress to the channel. The tensile stress caused by the differential contraction can thus improve the performance of an NMOS transistor. Unfortunately, such a tensile stress decreases the mobility of holes, the majority carrier in PMOS transistors, and hence can degrade the performance of a PMOS transistor if applied to the PMOS transistor channel.
Accordingly, it is desirable to provide methods for fabricating CMOS transistors that enhance the mobility of electrons in NMOS transistors and minimize mobility degradation of holes in PMOS transistors. In addition, it is desirable to provide methods for fabricating CMOS transistors that include metal silicide contacts to source and drain regions with optimized channel stress. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.